1. Field of the Invention
The present invention relates to methods for making compound semiconductors and methods for making semiconductor devices. More particularly, the present invention relates to a method for making a compound semiconductor including a compound semiconductor layer having a lattice mismatch ratio of 2% or more relative to a substrate, and a method for making a semiconductor device having the compound semiconductor.
2. Description of the Related Art
In the past, in semiconductors constituting semiconductor devices, such as optical devices operated at a target wavelength of 1.3 μm and high electron mobility transistors, InP substrates in which lattice matching with compound semiconductor layers composed of InGaAs or the like can be achieved have been used.
However, InP is expensive and difficult to handle because of its extreme softness, and thus there are problems with using InP as a substrate in a semiconductor.
Consequently, recently, there has been an attempt to use GaAs as a substrate. However, deposition of a semiconductor crystal having a different lattice constant from that of GaAs on a GaAs substrate is accompanied by lattice mismatching. Many crystal defects are generated by the lattice mismatching and the crystallinity is degraded.
When various types of semiconductors or semiconductor devices are fabricated, the characteristics are degraded and the percentage of defects is increased due to the generation of crystal defects and the resulting degradation in crystallinity during fabrication of semiconductors.
For example, when a light-emitting device including a semiconductor laser or a semiconductor light-emitting device is fabricated, light emission efficiency is decreased due to non-radiative recombination, and moreover, defects are multiplied during operation, resulting in a decrease in the life of the device.
Furthermore, for example, when a photodetector including a photodiode or a semiconductor photodetector device is fabricated, the speed of response to receipt of light is decreased and the output is decreased due to carrier trapping based on non-radiative recombination.
Meanwhile, with respect to the fabrication of a semiconductor in which lattice mismatching is present between a substrate and a compound semiconductor layer, as shown in a schematic cross-sectional view of FIG. 10, a semiconductor 101 in which crystal defects due to lattice mismatching are decreased has been proposed (e.g., refer to Japanese Unexamined Patent Application Publication No. 2002-373999). In the semiconductor 101, prior to the formation of a compound semiconductor layer (light-absorbing layer) 104, a buffer layer 103 having a composition gradient is disposed on an InP substrate 102, and the compound semiconductor layer 104 is disposed on the buffer layer 103, the buffer layer 103 reducing the lattice mismatching between the substrate 102 and the compound semiconductor layer 104. Reference numeral 105 represents a window layer.